Hey all. So I received a couple messages on Twitter asking for more details on my previous post about how to actually set up the UP VGA peripherals in Qsys. I like taking things step-by-step (and I’m really busy with school right now @_@), so rather than posting the whole project in one go, I’m going …
Double Buffering with UP Video IP Cores
I’ve been playing around some more with the Altera University Program Video IP cores, and one of the things I had a lot of trouble with was getting double buffering to work properly. The concept is simple enough, but there are a couple subtleties that made it a little difficult. Requirements Quartus II, Nios SBT, …
Simple SD Card Interfacing
Recently I had to log some data to an SD card using an Altera FPGA on a Terasic DE4, and I was pleasantly surprised at how simple it was. Definitely room for improvement, as I’ll discuss later, but for now this seems good enough! Requirements First things first, you’ll need your DE board (I was …
Quartus Compilation Time
Well, finals week month is over, and at least one holiday has come & gone, which means I’ve gotten a chance to finish up the projects pages and a few other things on my to-do list. That being said, I think it’s about time I start actually posting here. Today’s topic is on compiling designs in …
First things first…
Hello, and welcome! First – let me say that this is all still under construction. I did, however, get a little impatient with myself, and the maintenance mode landing page I had going on. So I went on a bit of a finals-week-procrastination spree, sat down and chose a theme, customized a bit, and updated …